Innovaide Join’s Cadence Connections Verification Program

Innovaide Join’s Cadence Connections Verification Program

Marlborough, MA, January 20, 2013

Innovaide has joined Cadence’s Verification partners program.

Innovaide Inc. announced today that it has joined the Cadence Connections Verification Program. The Connections Program members are selected for their skills and expertise in ASIC Verification technologies and ability to engage successfully with mutual customers.

“The partnership with Cadence provides Innovaide team the ability to handle customer designs in a turnkey fashion with state of the art tools from Cadence. It also allows us to build IPs and technologies that are proven on Cadence tool suite”, according
to Abhijit Sarid, President and CEO of Innovaide.

Innovaide provides design services for design and verification of ASICs from architecture, design, coding in Verilog and VHDL, mapping to appropriate ASIC technologies and optimization for timing and performance. Innovaide also develops and
licenses re-usable Intellectual Property (IP) blocks written in Verilog. These IP blocks can be customized to specific customer requirements as determined by customer design requirements. These blocks are available as Verilog implementation for easy mapping
into any FPGA and ASIC technology

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